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參數(shù)資料
| 型號： | ST72321BM |
| 廠商： | 意法半導體 |
| 英文描述： | 80-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE(具有ICP,IAP,Nested Interrupt,TLI,ROP的8位MCU) |
| 中文描述： | 80引腳8位微控制器32至60,000閃存/ ROM，ADC的，5個定時器，SPI和SCI的I2C接口（具有比較方案，國際檢察官聯(lián)合會，嵌套中斷，中華語文研習所，人事登記的8位微控制器） |
| 文件頁數(shù)： | 57/178頁 |
| 文件大?。?/td> | 3121K |
| 代理商： | ST72321BM |
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ST72F321M, ST72321BM
57/178
ON-CHIP PERIPHERALS
(Cont’d)
9.3.2 Functional Description
Counter
The free running 8-bit counter is fed by the output
of the prescaler, and is incremented on every ris-
ing edge of the clock signal.
It is possible to read or write the contents of the
counter on the fly by reading or writing the Counter
Access register (ARTCAR).
When a counter overflow occurs, the counter is
automatically reloaded with the contents of the
ARTARR register (the prescaler is not affected).
Counter clock and prescaler
The counter clock frequency is given by:
f
COUNTER
= f
INPUT
/ 2
CC[2:0]
The timer counter’s input clock (f
INPUT
) feeds the
7-bit programmable prescaler, which selects one
of the 8 available taps of the prescaler, as defined
by CC[2:0] bits in the Control/Status Register
(ARTCSR). Thus the division factor of the prescal-
er can be set to 2
n
(where n = 0, 1,..7).
This f
INPUT
frequency source is selected through
the EXCL bit of the ARTCSR register and can be
either the f
CPU
or an external input frequency f
EXT
.
The clock input to the counter is enabled by the
TCE (Timer Counter Enable) bit in the ARTCSR
register. When TCE is reset, the counter is
stopped and the prescaler and counter contents
are frozen. When TCE is set, the counter runs at
the rate of the selected clock source.
Counter and Prescaler Initialization
After RESET, the counter and the prescaler are
cleared and f
INPUT
= f
CPU
.
The counter can be initialized by:
– Writing to the ARTARR register and then setting
the FCRL (Force Counter Re-Load) and the TCE
(Timer Counter Enable) bits in the ARTCSR reg-
ister.
– Writing to the ARTCAR counter access register,
In both cases the 7-bit prescaler is also cleared,
whereupon counting will start from a known value.
Direct access to the prescaler is not possible.
Output compare control
The timer compare function is based on four differ-
ent comparisons with the counter (one for each
PWMx output). Each comparison is made be-
tween the counter value and an output compare
register (OCRx) value. This OCRx register can not
be accessed directly, it is loaded from the duty cy-
cle register (PWMDCRx) at each overflow of the
counter.
This double buffering method avoids glitch gener-
ation when changing the duty cycle on the fly.
Figure 34. Output compare control
COUNTER
FDh
FEh
FFh
FDh
FEh
FFh
FDh
FEh
ARTARR=FDh
f
COUNTER
OCRx
PWMDCRx
FDh
FEh
FDh
FEh
FFh
PWMx
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ST72321BR6-AUTO | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-bit MCU for automotive with 32 to 60 Kbyte Flash/ROM, ADC, 5 timers, SPI, SCI, I2C interface |
| ST72321BR7-AUTO | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-bit MCU for automotive with 32 to 60 Kbyte Flash/ROM, ADC, 5 timers, SPI, SCI, I2C interface |
| ST72321BR9-AUTO | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-bit MCU for automotive with 32 to 60 Kbyte Flash/ROM, ADC, 5 timers, SPI, SCI, I2C interface |
| ST72321BXXX-AUTO | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-bit MCU for automotive with 32 to 60 Kbyte Flash/ROM, ADC, 5 timers, SPI, SCI, I2C interface |
| ST72321J | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 5 TIMERS, SPI, SCI, I2C INTERFACE |
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