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| 型號： | ST72321BM |
| 廠商： | 意法半導體 |
| 英文描述： | 80-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE(具有ICP,IAP,Nested Interrupt,TLI,ROP的8位MCU) |
| 中文描述： | 80引腳8位微控制器32至60,000閃存/ ROM，ADC的，5個定時器，SPI和SCI的I2C接口（具有比較方案，國際檢察官聯(lián)合會，嵌套中斷，中華語文研習所，人事登記的8位微控制器） |
| 文件頁數(shù)： | 151/178頁 |
| 文件大小： | 3121K |
| 代理商： | ST72321BM |
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ST72F321M, ST72321BM
151/178
EMC CHARACTERISTICS
(Cont’d)
11.7.3 Absolute Maximum Ratings (Electrical
Sensitivity)
Based on three different tests (ESD, LU and DLU)
using specific measurement methods, the product
is stressed in order to determine its performance in
terms of electrical sensitivity. For more details, re-
fer to the application note AN1181.
11.7.3.1 Electro-Static Discharge (ESD)
Electro-Static Discharges (a positive then a nega-
tive pulse separated by 1 second) are applied to
the pins of each sample according to each pin
combination. The sample size depends on the
number of supply pins in the device (3 parts*(n+1)
supply pin). Two models can be simulated: Human
Body Model and Machine Model. This test con-
forms to the JESD22-A114A/A115A standard.
Absolute Maximum Ratings
Notes:
1. Data based on characterization results, not tested in production.
11.7.3.2 Static and Dynamic Latch-Up
■
LU
: 3 complementary static tests are required
on 10 parts to assess the latch-up performance.
A supply overvoltage (applied to each power
supply pin) and a current injection (applied to
each input, output and configurable I/O pin) are
performed on each sample. This test conforms
to the EIA/JESD 78 IC latch-up standard. For
more details, refer to the application note
AN1181.
■
DLU
: Electro-Static Discharges (one positive
then one negative test) are applied to each pin
of 3 samples when the micro is running to
assess the latch-up performance in dynamic
mode. Power supplies are set to the typical
values, the oscillator is connected as near as
possible to the pins of the micro and the
component is put in reset mode. This test
conforms to the IEC1000-4-2 and SAEJ1752/3
standards. For more details, refer to the
application note AN1181.
Electrical Sensitivities
Notes:
1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC spec-
ifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B Class strictly covers all the
JEDEC criteria (international standard).
Symbol
Ratings
Conditions
Maximum value
1)
Unit
V
ESD(HBM)
Electro-static discharge voltage
(Human Body Model)
Electro-static discharge voltage
(Machine Model)
T
A
=
+25°C
2000
V
V
ESD(MM)
T
A
=
+25°C
200
Symbol
Parameter
Conditions
Class
1)
LU
Static latch-up class
T
A
=
+25°C
T
A
=
+85°C
T
A
=
+125°C
V
DD
=
5.5V, f
OSC
=
4MHz, T
A
=
+25°C
A
A
A
A
DLU
Dynamic latch-up class
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| ST72321J | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 5 TIMERS, SPI, SCI, I2C INTERFACE |
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