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參數(shù)資料
| 型號(hào)： | S1C63158D0A010Q |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, UUC53 |
| 封裝： | DIE-53 |
| 文件頁(yè)數(shù)： | 114/159頁(yè) |
| 文件大?。?/td> | 1200K |
| 代理商： | S1C63158D0A010Q |
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50
EPSON
S1C63808 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Stopwatch Timer)
Figure 4.8.2.1 shows the operation of the prescaler.
Prescaler input clock (1,024 Hz)
Prescaler output clock
Counter data
START
000 001 002
037 038
039
040 041
Fig. 4.8.2.1 Timing of the prescaler operation
For the above reason, the counting clock is 1,024 Hz (0.9765625 msec) except during pulse correction.
Consequently, frequency of the prescaler output clock (1,000 Hz), 100 Hz generated by SWD0–3 and 10
Hz generated by SWD4–7 are approximate values.
4.8.3 Capture buffer and hold function
The stopwatch data, 1/1,000 sec, 1/100 sec and 1/10 sec, can be read from SWD0–3 (FF7DH), SWD4–7
(FF7EH) and SWD8–11 (FF7FH), respectively. The counter data are latched in the capture buffer when
reading, and are held until reading of three words is completed. For this reason, correct data can be read
even when a carry from lower digits occurs during reading the three words. Further, three counter data
are latched in the capture buffer at the same time when SWD0–3 (1/1,000 sec) is read. The data hold is
released when SWD8–11 (1/10 sec) reading is completed. Therefore, data should be read in order of
SWD0–3
→ SWD4–7 → SWD8–11. If SWD4–7 or SWD8–11 is first read when data have not been held, the
hold function does not work and data in the counter is directly read out. When data that has not been
held is read in the stopwatch timer RUN status, you cannot judge whether it is correct or not.
The stopwatch timer has a LAP function using an external key input (explained later). The capture buffer
is also used to hold LAP data. In this case, data is held until SWD8–11 is read. However, when a LAP
input is performed before completing the reading, the content of the capture buffer is renewed at that
point. Remaining data that have not been read become invalid by the renewal, and the hold status is not
released if SWD8–11 is read. When SWD8–11 is read after the capture buffer is updated, the capture
renewal flag is set to "1" at that point. In this case, it is necessary to read from SWD0–3 again. The capture
renewal flag is renewed by reading SWD8–11.
Figure 4.8.3.1 shows the timing for data holding and reading.
Direct LAP input (K01/K00)
Direct LAP internal signal
Capture renewal flag CRNWF
SWD0–3 reading
SWD4–7 reading
SWD8–11 reading
Data holding
Fig. 4.8.3.1 Timing for data holding and reading
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