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參數(shù)資料
| 型號(hào)： | S1C63158D0A010Q |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, UUC53 |
| 封裝： | DIE-53 |
| 文件頁(yè)數(shù)： | 105/159頁(yè) |
| 文件大?。?/td> | 1200K |
| 代理商： | S1C63158D0A010Q |
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S1C63808 TECHNICAL MANUAL
EPSON
i
CONTENTS
CONTENTS
CHAPTER
1OUTLINE ________________________________________________ 1
1.1
Features ......................................................................................................... 1
1.2Block Diagram .............................................................................................. 2
1.3
Pin Layout Diagram ..................................................................................... 3
1.4
Pin Description ............................................................................................. 4
1.5
Mask Option .................................................................................................. 5
CHAPTER
2POWER SUPPLY AND INITIAL RESET ____________________________ 8
2.1
Power Supply ................................................................................................ 8
2.1.1 Voltage regulator for OSC1 oscillation circuit .......................................... 8
2.1.2 Voltage regulator for the internal logic system ......................................... 8
2.1.3 EPD system voltage circuit ........................................................................ 8
2.2
Initial Reset ................................................................................................... 9
2.2.1 Reset terminal (RESET) ............................................................................. 9
2.2.2 Simultaneous high input to terminals K00–K03 ...................................... 10
2.2.3 Oscillation-detect circuit ........................................................................... 10
2.2.4 Internal register at initial resetting ........................................................... 10
2.2.5 Terminal settings at initial resetting ......................................................... 11
2.3
Test Terminal (TEST) ................................................................................... 11
CHAPTER
3 CPU, ROM, RAM ________________________________________ 12
3.1
CPU .............................................................................................................. 12
3.2
Code ROM .................................................................................................... 12
3.3
RAM ............................................................................................................. 12
CHAPTER
4PERIPHERAL CIRCUITS AND OPERATION __________________________ 14
4.1
Memory Map ................................................................................................ 14
4.2Watchdog Timer ........................................................................................... 22
4.2.1 Configuration of watchdog timer .............................................................. 22
4.2.2 Interrupt function ...................................................................................... 22
4.2.3 I/O memory of watchdog timer ................................................................. 23
4.2.4 Programming notes ................................................................................... 23
4.3
Oscillation Circuit ....................................................................................... 24
4.3.1 Configuration of oscillation circuit .......................................................... 24
4.3.2 OSC1 oscillation circuit ............................................................................ 24
4.3.3 OSC3 oscillation circuit ............................................................................ 25
4.3.4 Switching of CPU clock ............................................................................ 26
4.3.5 Clock frequency and instruction execution time ....................................... 26
4.3.6 I/O memory of oscillation circuit .............................................................. 27
4.3.7 Programming notes ................................................................................... 27
4.4
Input Ports (K00–K03 and K10–K13) ......................................................... 28
4.4.1 Configuration of input ports ..................................................................... 28
4.4.2 Interrupt function ...................................................................................... 28
4.4.3 Mask option ............................................................................................... 29
4.4.4 I/O memory of input ports ......................................................................... 30
4.4.5 Programming notes ................................................................................... 32
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