參數(shù)資料
型號(hào): MT90503
廠商: Zarlink Semiconductor Inc.
英文描述: 2048VC AAL1 SAR
中文描述: 2048VC AAL1特區(qū)
文件頁(yè)數(shù): 61/233頁(yè)
文件大?。?/td> 1341K
代理商: MT90503
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MT90503
Data Sheet
61
Zarlink Semiconductor Inc.
The number of events per frame in the scheduler, Num Env, determines how much memory is allocated for each
frame in the scheduler: 2 words per event. Within this memory, the scheduler will read only the first 2m events, as
stored in the Read 2m Events field. Of the events that are read, only those with the Scheduler Num not equal to
‘1111’ (see Table 19) are executed. No action is taken on events that are read whose Scheduler Num is ’1111’.
4.3.2.4 Scheduler Events Fields Description
Table 19 - Scheduler Event Fields provides a description of the fields for the transmit event scheduler entries.
Figure 24 - Transmit Event Scheduler Process to locate the fields
4.3.2.5 Bandwidth Limitations for Transmit Scheduler Events
The maximum number of events per frame corresponds to the maximum number of events that can occur in one
frame of all the schedulers simultaneously.
If the frames are not synchronised (as in Figure 25 - Unsyncrhonised Schedulers), the maximum number of events
per frame is the sum of the maximum events in any frame of each scheduler (in this case, 32 events + 21 events =
53 events is the maximum number of events per frame). If the schedulers are synchronised (as in Figure 26 -
Synchronised Schedulers), the maximum number of events per frame is the worst in any particular frame (in this
case, 23 + 17 = 40 events is greater than 6 + 24 = 30 events, so 40 events is the maximum number). If the
schedulers are partially synchronised (as in Figure 27 - Partially Synchronised Schedulers), the maximum number
of events per frame is the worst in any frame that can possibly align (in this case, 20 + 5 = 25 events is less than 27
+ 12 = 39 events which is greater than 20 + 16 = 36 events and 27 + 7 = 34 events so 39 events is the maximum
number).
Field
Name of Field
Bits
Used
Description of Field
Scheduler Num
Transmit Event
Scheduler
Number
+0/b5:b2
This field contains the scheduler number.
0000 to 1110 = valid scheduler numbers
1111 = invalid event. No action will be taken on this event
The transmit event schedulers are read sequentially.
This field indicates the first event that will be carried out
when the VC is initialised.
Software must set the S bit of only one event once
programming of the scheduler is complete.
This bit is only relevant until the I bit is set in the TX Control
Structure. After the I bit is set, all events with valid scheduler
numbers will be executed as they are encountered.
This field is the pointer to the TX_SAR Structure used to
assemble an ATM cell each time this event is read. This field
is appended with "00000" as the LSBs to form a 20-bit
address.
S
Start Bit
+0/b0
TX Structure
Address Pointer
TX Structure
Address Pointer
+2/b14:b0
Table 19 - Scheduler Event Fields
Transmission Speed
Maximum Number of Events per Frame
25 Mbps
155 Mbps
622 Mbps
7
45
183
Table 20 - Maximum number of Events per Frame for Common Transmission Speeds
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