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參數(shù)資料
| 型號(hào)： | MC68HC05B16 |
| 廠商： | Motorola, Inc. |
| 元件分類： | DC/DC變換器 |
| 英文描述： | RS-S_D(Z) Series - Econoline Regulated DC-DC Converters; Input Voltage (Vdc): 24V; Output Voltage (Vdc): 15V; Power: 2W; 2:1 and 4:1 Wide Input Voltage Ranges; 1kVDC, 2kVD & 3kVDC Isolation; UL94V-0 Package Material; Continuous Short Circuit Protection; Low Noise; No External Capacitor needed; Efficiency to 83% |
| 中文描述： | 高密度互補(bǔ)金屬氧化物半導(dǎo)體（HCMOS）微機(jī)組 |
| 文件頁(yè)數(shù)： | 47/96頁(yè) |
| 文件大?。?/td> | 3045K |
| 代理商： | MC68HC05B16 |
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MC68HC05SR3
Freescale
7-1
ANALOG TO DIGITAL CONVERTER
7
ANALOG TO DIGITAL CONVERTER
The analog to digital converter system consists of a single 8-bit successive approximation
converter and an 8-channel analog multiplexer. Four of the channels are available for analog
inputs, and the other four channels are dedicated to internal test functions. There is one 8-bit ADC
Data Register ($0F) and one 8-bit ADC Status and Control register ($0E). The reference supply,
VRL and VRH for the converter uses two input pins (shared with PD4 and PD5) instead of the power
supply lines, because drops caused by loading in the power supply lines would degrade the
accuracy of the analog to digital conversion. An internal RC oscillator is available if the bus speed
is low enough to degrade the ADC accuracy. An ADON bit allows the ADC to be switched off to
reduce power consumption, which is particularly useful in the Wait mode.
Figure 7-1 ADC Converter Block Diagram
CH2
CH1
CH0
COCO
ADRC
ADON
8-bit capacitive DAC
with sample and hold
Successive approximation
register and control
Result
ADC Status and Control Register ($0E)
Analog
MUX
(Chan
nel
as
sig
nment)
ADC Data Register ($0F)
VRH
VRL
AN0
VRH
(VRH+VRL)/2
VRL
AN1
AN2
AN3
(VRH+VRL)/4
8
TPG
49
05SR3.Book Page 1 Thursday, August 4, 2005 1:08 PM
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