參數(shù)資料
型號: MC33984
廠商: Motorola, Inc.
英文描述: Dual Intelligent High-Current Self-Protected Silicon High-Side Switch (4.0 mз)
中文描述: 雙智能大電流的自我保護(hù)硅高邊開關(guān)(4.0mз)
文件頁數(shù): 28/28頁
文件大?。?/td> 492K
代理商: MC33984
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33984
9
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions 4.5 V
≤ VDD ≤ 5.5V, 6.0V ≤ VPWR ≤ 27 V, -40°C ≤ TJ ≤ 150°C unless otherwise noted. Typical
values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
CONTROL INTERFACE
Input Logic High Voltage (Note 13)
VIH
0.7VDD
V
Input Logic Low Voltage (Note 13)
VIL
0.2VDD
V
Input Logic Voltage Hysteresis (Note 14)
VIN[0:1](HYS)
100
350
750
mV
Input Logic Pulldown Current (SCLK, IN, SI)
IDWN
5.0
20
A
RST
Input Voltage Range
VRST
4.5
5.0
5.5
V
SO, FS Tri-State Capacitance (Note 15)
CSO
20
pF
Input Logic Pulldown Resistor (RST) and WAKE
RDWN
100
200
400
k
Input Capacitance (Note 15)
CIN
4.0
12
pF
WAKE Input Clamp Voltage (Note 16)
ICL(WAKE) <2.5 mA
VCL(WAKE)
7.0
14
V
WAKE Input Forward Voltage
ICL(WAKE) = -2.5 mA
VF(WAKE)
-2.0
-0.3
V
SO High-State Output Voltage
IOH = 1.0 mA
VSOH
0.8 VDD
V
FS
, SO Low-State Output Voltage
IOL = -1.6 mA
VSOL
0.2
0.4
V
SO Tri-State Leakage Current
CS
> 0.7 VDD
ISO(LEAK)
-5.0
0
5.0
A
Input Logic Pullup Current (Note 17)
CS
, VIN[0:1] > 0.7 VDD
IUP
5.0
20
A
FSI Input Terminal External Pulldown Resistance
FSI Disabled, HS[0:1] Indeterminate
FSI Enabled, HS[0:1] OFF
FSI Enabled, HS0 ON, HS1 OFF
FSI Enabled, HS[0:1] ON
RFS
RFSdis
RFSoffoff
RFSonoff
RFSonon
6.0
15
40
0
6.5
17
Infinite
1.0
7.0
19
k
Notes
13.
Upper and lower logic threshold voltage range applies to SI, CS, SCLK, RST, IN[0:1], and WAKE input signals. The WAKE and RST signals
may be supplied by a derived voltage reference to VPWR.
14.
Parameter is guaranteed by processing monitoring but is not production tested.
15.
Input capacitance of SI, CS, SCLK, RST, and WAKE. This parameter is guaranteed by process monitoring but is not production tested.
16.
The current must be limited by a series resistance when using voltages > 7.0 V.
17.
Pullup current is with CS OPEN. CS has an active internal pullup to VDD.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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