
MPC5604P Microcontroller Data Sheet, Rev. 7
Freescale Semiconductor
79
Figure 26. Nexus TDI, TMS, TDO timing
3.17.4
External interrupt timing (IRQ pin)
Table 38. External interrupt timing1
1 IRQ timing specified at f
SYS = 64 MHz and VDD_HV_IOx = 3.0 V to 5.5 V, TA = TL to TH, and CL = 200 pF
with SRC = 0b00.
No.
Symbol
C
Parameter
Conditions
Value
Unit
Min
Max
1tIPWL
CC
D IRQ pulse width low
—
4
—
tCYC
2tIPWH
CC
D IRQ pulse width high
—
4
—
tCYC
3tICYC
CC
D IRQ edge to edge time2
2 Applies when IRQ pins are configured for rising edge or falling edge events, but not both.
—4 + N 3
—tCYC
TDO
6
7
TMS, TDI
8
TCK
9