?/DIV>
E
m
m
R
ON
3
.
14
005
.
0
25
110
1
10
(13)
The final step is to make sure that the heat sinking
available to the MOSFET is capable of dissipating at
least as much power (rated in 篊/W) as that with which
the   MOSFETs   performance   was   specified   by   the
manufacturer. Here are a few practical tips:
1. The heat from a surface-mount device such as
an SOIC-8 MOSFET flows almost entirely out
of the drain leads. If the drain leads can be
soldered down to one square inch or more, the
copper will act as the heat sink for the part.
This copper must be on the same layer of the
board as the MOSFET drain.
2. Airflow works. Even a few LFM (linear feet per
minute) of air will cool a MOSFET down
substantially.
  If you can, position the MOSFET(s) near the
inlet of a power supplys fan, or the outlet of a
processors cooling fan.
3. The best test of a surface-mount MOSFET for
an application (assuming the above tips show
it to be a likely fit) is an empirical one. Check
the MOSFETs temperature in the actual layout
of the expected final circuit, at full operating
current. The use of a thermocouple on the
drain leads, or infrared pyrometer on the
package, will then give a reasonable idea of
the devices junction temperature.
MOSFET Transient Thermal Issues
Having chosen a MOSFET that will withstand the
imposed   voltage   stresses,   and   the   worse   case
continuous I
2
R power dissipation which it will see, it
remains only to verify the MOSFETs ability to handle
short-term    overload    power    dissipation    without
overheating. A MOSFET can handle a much higher
pulsed power without damage than its continuous
dissipation ratings would imply. The reason for this is
that, like everything else, thermal devices (silicon die,
lead frames, etc.) have thermal inertia.
In terms related directly to the specification and use of
power MOSFETs, this is known as transient thermal
impedance, or Z
?JA)
. Almost all power MOSFET data
sheets give a Transient Thermal Impedance Curve. For
example, take the following case: V
IN
= 12V, t
OCSLOW
has
been set to 100msec, I
LOAD(CONT. MAX)
is 2.5A, the slow-
trip   threshold   is   50mV   nominal,   and   the   fast-trip
threshold   is   100mV.   If   the   output   is   accidentally
connected to a 3& load, the output current from the
MOSFET will be regulated to 2.5A for 100ms (t
OCSLOW
)
before the part trips. During that time, the dissipation in
the MOSFET is given by:
P = E x I; E
MOSFET
= [12V-(2.5A)(3&)] = 4.5V
P
MOSFET
= (4.5V x 2.5A) = 11.25W for 100msec.
At first glance, it would appear that a really hefty
MOSFET is required to withstand this sort of fault
condition. This is where the transient thermal impedance
curves become very useful. Figure 10 shows the curve
for the Vishay (Siliconix) Si4410DY, a commonly used
SOIC-8 power MOSFET.
Taking the simplest case first, well assume that once a
fault event such as the one in question occurs, it will be
a long time 10 minutes or more before the fault is
isolated and the channel is reset. In such a case, we can
approximate this as a single pulse event, that is to say,
theres no significant duty cycle. Then, reading up from
the X-axis at the point where Square Wave Pulse
Duration is equal to 0.1sec (=100msec), we see that the
Z
?JA)
of this MOSFET to a highly infrequent event of this
duration is only 8% of its continuous R
?JA)
.
This particular part is specified as having an R
?JA)
of
50癈/W for intervals of 10 seconds or less.