
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
28
Freescale Semiconductor
Electrical Characteristics
4.3.5
I2C I/O DC Parameters
NOTE
See the errata for HS-I2C in i.MX51 Chip Errata document. The two
standard I2C modules have no errata.
The DC Electrical Characteristics listed below are guaranteed using operating ranges per
Table 13, unless
otherwise noted.
Input Hysteresis
VHYS
Low voltage mode
High voltage mode
0.38
0.95
—0.43
1.33
V
Schmitt trigger VT+2,3
VT+
—
0.5OVDD
—
V
Schmitt trigger VT–2,4
VT–
—
0.5
× OVDD
V
Input current (no pull-up/down)
Iin
Vin = 0
Vin = OVDD
——
See Note 4
—
Input current (22 k
Ω Pull-up)
Iin
Vin = 0
—
202
μA
Input current (75 k
Ω Pull-up)
Iin
Vin = 0
—
61
μA
Input current (100 k
Ω Pull-up)
Iin
Vin = 0
—
47
μA
Input current (360 k
Ω Pull-down)
Iin
Vin = OVDD
—
5.7
μA
Keeper Circuit Resistance
—
NA
—
17
—
k
Ω
1
To maintain a valid level, the transitioning edge of the input must sustain a constant slew rate (monotonic) from the current DC
level through to the target DC level, VIL or VIH. Monotonic input transition time is from 0.1 ns to 1 s.
2 Overshoot and undershoot conditions (transitions above OVDD and below OVSS) on switching pads must be held below 0.6 V,
and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/undershoot must be
controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other methods.
Non-compliance to this specification may affect device reliability or cause permanent damage to the device.
3 Hysteresis of 250 mV is guaranteed over all operating conditions when hysteresis is enabled.
4 I/O leakage currents are listed in Table 25. Table 22. I2C Standard/Fast/High-Speed Mode Electrical Parameters for Low/Medium Drive Strength
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Low-level output voltage
Vol
Iol = 3 mA
—
0.4
V
High-Level DC input voltage 1
VIH
—
0.7
× OVDD
—
OVDD
V
Low-Level DC input voltage1
VIL
—
0
—
0.3
× OVDD
V
Input Hysteresis
VHYS
—
0.25
—
V
Schmitt trigger VT+1,2
VT+
—
0.5
× OVDD
—
V
Schmitt trigger VT– 1,2
VT–
—
0.5
× OVDD
V
I/O leakage current (no pull-up)
Iin
VI = OVDD or 0
—
See Note 3
—
Table 21. UHVIO DC Electrical Characteristics (continued)
DC Electrical Characteristics
Symbol
Test Conditions
Min
Typ
Max
Unit