
Technical Data
M68HC11K Family
76
Operating Modes and On-Chip Memory
MOTOROLA
Operating Modes and On-Chip Memory
4.4 System Initialization
Registers and bits that control initialization and the basic operation of the
MCU are protected against writes except under special circumstances.
Table 4-1 lists registers that can be written only once after reset or that
must be written within the first 64 cycles after reset.
Table 4-1. Registers with Limited Write Access
Operating
Mode
Register
Address
Register Name
Must be Written
in First 64 Cycles
Write
Anytime
SMOD = 0
$x024
Timer interrupt mask 2 (TMSK2)
Bits [1:0], once only
Bits [7:2]
$x035
Block protect register (BPROT)
Clear bits, once only
Set bits only
$x037
EEPROM mapping register (INIT2)
No, bits [7:4], once
only
—
$x038
System configuration options 2
register (OPT2)
No, bit 4, once only
See OPT2
description
$x039
System configuration
options (OPTION)
Bits [5:4], bits [2:0],
once only
Bits [7:6], bit 3
$x03C
Highest priority I-bit interrupt
and miscellaneous (HPRIO)
—
See HPRIO
description
$x03D
RAM and I/O map register (INIT)
Yes, once only
—
SMOD = 1
$x024
Timer interrupt mask 2 (TMSK2)
—
All, set or clear
$x035
Block protect register (BPROT)
—
All, set or clear
$x037
EEPROM mapping register (INIT2)
—
Bits [7:4]
$x038
System configuration options 2
register (OPT2)
—
See OPT2
description
$x039
System configuration options
(OPTION)
—
All, set or clear
$x03C
Highest priority I-bit interrupt and
miscellaneous (HPRIO)
—
See HPRIO
description
$x03D
RAM and I/O map register (INIT)
—
All, set or clear
$x03F
System configuration register
(CONFIG)
—
See CONFIG
description
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