
56F8367 Technical Data, Rev. 9
136
Freescale Semiconductor
Preliminary
GPIOD
0
GPIO
CS2 / CAN2_TX
55
1
GPIO
CS3 / CAN2_RX
56
2
GPIO
CS4
57
3
GPIO
CS5
58
4
GPIO
CS6
59
5
GPIO
CS7
60
6Peripheral
TXD1
49
7Peripheral
RXD1
50
8Peripheral
PS / CS0
53
9Peripheral
DS / CS1
54
10
Peripheral
ISB0
61
11
Peripheral
ISB1
63
12
Peripheral
ISB2
64
GPIOE
0Peripheral
TXD0
4
1Peripheral
RXD0
5
2Peripheral
A6
17
3Peripheral
A7
18
4
Peripheral
SCLK0
146
5
Peripheral
MOSI0
148
6
Peripheral
MISO0
147
7
Peripheral
SS0
145
8
Peripheral
TC0
133
9
Peripheral
TC1
135
10
Peripheral
TD0
129
11
Peripheral
TD1
130
12
Peripheral
TD2
131
13
Peripheral
TD3
132
Table 8-3 GPIO External Signals Map (Continued)
Pins in italics are NOT available in the 56F8167 device
GPIO Port
GPIO Bit
Reset
Function
Functional Signal
Package Pin