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參數(shù)資料
| 型號： | CY28317 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時鐘和緩沖器 |
| 文件頁數(shù)： | 13/17頁 |
| 文件大?。?/td> | 240K |
| 代理商： | CY28317 |
CY28312B-2
Document #: 38-07596 Rev. **
Page 13 of 17
Absolute Maximum Conditions
[2]
Stresses greater than those listed in this table may cause
permanent damage to the device. These represent a stress
rating only. Operation of the device at these or any other condi-
tions above those specified in the operating sections of this
specification is not implied. Maximum conditions for extended
periods may affect reliability.
Parameter
V
DD
, V
IN
Description
Rating Unit
–0.5 to
+7.0
–65 to
+150
–55 to
+125
0 to +70
2 (min.)
Voltage on any pin with respect
to GND
Storage temperature
V
T
STG
°C
T
B
Ambient temperature under
bias
Operating temperature
Input ESD protection
°C
T
A
ESD
PROT
°C
kV
DC Electrical Characteristics
T
A
= 0°C to +70°C, V
DD
= 3.3V ± 5% and 2.5V ± 5%
Parameter
Supply Current
I
DD
Description
Test Condition
Min.
Typ.
Max.
Unit
3.3V Supply Current
CPU =100 MHz
Outputs Loaded
[3]
CPUCS =100 MHz
Outputs Loaded
[3]
260
mA
I
DD
2.5V Supply Current
25
mA
Logic Inputs
V
IL
V
IH
I
IL
I
IH
Clock Outputs
V
OL
V
OH
V
OL
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
GND – 0.3
2.0
0.8
V
V
μA
μA
V
DD
+ 0.3
–25
10
Output Low Voltage
Output High Voltage
Output Low Voltage
I
OL
= 1 mA
I
OH
= –1 mA
Termination to V pull-up
(external)
50
mV
V
V
3.1
0
CPUT_CS,
CPUC_CS,
CPUT0, CPUC0
CPUT_CS,
CPUC_CS,
CPUT0, CPUC0
PCI, AGP
REF
48 MHz
24_48 MHz
PCI, AGP
REF
48 MHz
24_48 MHz
0.3
V
OH
Output High Voltage
Termination to V pull-up
(external)
1.0
1.2
V
I
OL
Output Low Current
V
OL
= 1.5V
V
OL
= 1.5V
V
OL
= 1.5V
V
OL
= 1.5V
V
OH
= 1.5V
V
OH
= 1.5V
V
OH
= 1.5V
V
OH
= 1.5V
70
50
50
50
70
50
50
50
110
70
70
70
110
70
70
70
135
100
100
100
135
100
100
100
mA
mA
mA
mA
mA
mA
mA
mA
I
OH
Output High Current
Crystal Oscillator
V
TH
C
LOAD
X1 Input Threshold Voltage
Load Capacitance, Imposed on External
Crystal
[4]
Pin Capacitance/Inductance
C
IN
Notes:
2. Multiple Supplies: the voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
3. All clock outputs loaded with 6" 60
transmission lines with 20-pF capacitors.
4. The CY28312B-2 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal
is 18 pF; this includes typical stray capacitance of short PCB traces to crystal.
5. X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
V
DD
= 3.3V
1.65
18
V
pF
Input Pin Capacitance
[5]
Except X1 and X2
5
pF
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|---|---|
| CY28317-2 | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:FTG for Mobile VIA⑩ PL133T and PLE133T Chipsets |
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| CY28317PVXC-2 | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 NB Clk VIA SDRAM Chipsets / Tualatin RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| CY28317PVXC-2T | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 NB Clk VIA SDRAM Chipsets / Tualatin RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
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