
ASAHI KASEI
[AK8850]
OUTPUT FORMAT REGISTER ( W / R ) [ SUB ADDRESS 0x06 ]
Register to set output format.
Sub Address 0x06
Default Value : 0x00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 1
ACTSTA2
ACTSTA1
ACTSTA0
YCDELAY2
ERRHND
YCDELAY1
YCDELAY0
601LIMIT
Default Value
0
bit 2
bit 0
0
Output Format Register Definition
BIT
Register Name
R/W
Definition
bit 0
ERRHND
Error Handling bit
R/W
Setting the data handling procedure when
AK8850 cannot output the data follow to ITU-R.
Bt.656. Error handling normally occurs within the
last lines of the Frame.
0 : Line Drop/Repeat
1 : Number of Smaples of the line is change.
bit 1
601LIMIT
601 Output Limit bit
R/W
Min/Max value of the output data
0 : 1~254 (Y/Cb/Cr) [Default ]
1 : 16~235 (Y) 16~240 (Cb/Cr)
bit 2
~
bit 4
YCDELAY0
-
YCDELAY2
One delay time is 74nsec(1clock@13.5MHz)
[YCDELAY2-YCDELAY0]=
111 : Y-data is 1clock delay against C-data
Y/C Delay Control bit
R/W
Y/C delay setting for output data.
Set the value with 2’s complement
101 : Y-data is 3clocks delay against C-data
110 : Y-data is 2clocks delay against C-data
000 : No delay [Default]
001 : C-data is 1clock delay against Y-data
010 : C-data is 2clocks delay against Y-data
011 : C-data is 3clocks delay against Y-data
bit 7
ACTSTA0
Active Video Start Control bit
Set fine adjustment of Start position of decoded
video data.
Set the value with 2’s complement
011 : Decoding the video data 3pixels delayed.
bit 5
~
-
ACTSTA2
R/W
[ACTSTA2:ACTSTA0]=
101 : Decoding the video data 3pixels earlier.
110 : Decoding the video data 2pixels earlier.
111 : Decoding the video data 1pixel earlier.
000 : Normal position [Default]
001 : Decoding the video data 1pixel delayed.
010 : Decoding the video data 2pixels delayed.
Rev.0
74
2003/01